ver: 0.5 aug 20, 2012 tel: 886-3-5788833 http://www.gmt.com.tw 1 G3402 global mixed-mode technology 4-bit bidirectional voltage level translator for open drain and push-pull applications features ? 4-bit bidirectional translator for open drain and push-pull bus applications ? i 2 c and smbus compatible ? less than 1.5ns maximum propagation delay to accommodate standard-mode and fast-model i 2 c devices and multiple masters ? allows voltage-level translator between ? 1.8v v cca and 2.5v, 3.3v, 5v v ccb ? 2.5v v cca and 3.3v, 5v v ccb ? 3.3v v cca and 5v v ccb ? v cca Q v ccb ? provides bidirectional voltage translation without direction pin ? max data rates ? 24mbps for push pull ? over 1.3mbps for open drain ? low 3.5 on-state connection between input and output ports provides less signal distortion ? open-drain i 2 c i/o ports ? 5v tolerant i 2 c i/o ports to support mixed mode signal operation ? high impedance a n and b n pins for oe=low ? lock-up-free operation for isolation when oe=low ? iec 61000-4-2 level 4 (8kv contact discharge and 15kv air-gap discharge) esd protection for pins b1, b2, b3, b4, oe and vccb. 2kv hbm iec61340-3-1 protection for all other pins. general description the G3402 is a qual bidirectional i 2 c and smbus voltage-level translator with an output enable (oe) input, and is operational from 1.2v to 3.3v v cca and 2.5v to 5.5v v ccb . it allows bidirectional voltage trans- lations between 1.2v and 5v, without use of direc- tional pin. the low on-state resistance (r on ) of the switch ensures the connections to be with minimal propagation delay. when oe is high, the translator switch is on, and the a n i/o are connected to the b n i/o, respectively, allowing bidirectional data flow be- tween ports. when oe is low, the translator switch is off, and a high-impedance exists between ports. pull-up resistors are included on input and output lines internally to provide the logic high levels on the trans- lator?s bus. the size of the pull-up resistors are 10k , and is allowed to use lower pull-up resistor value to minimal 1k by adding external resistor. all channels have the same electrical characteristics, and there is minimal deviation from one output to an- other in voltage or propagation delay. this is a benefit over discrete translation solutions, since the fabrica- tion of the switch is symmetrical. ordering information order number marking temp. range package (green) G3402b51u 3402 -40 c to 85 c wlcsp3x4-12 G3402b51d 3402 -40 c to 85 c wlcsp3x4-12 note: b5: wlcsp3x4-12 1: bonding code u & d: tape & reel pin configuration a1 a2 a3 a4 b1 b2 b3 b4 vccb vcca oe gnd a b c d 321 bottom view wlcsp3x4-12 12 bump wlcsp a1 a2 a3 a4 b1 b2 b3 b4 vccb vcca oe gnd a b c d 321 bottom view wlcsp3x4-12 12 bump wlcsp
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